
strtok:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400668 <.init>:
  400668:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40066c:	910003fd 	mov	x29, sp
  400670:	9400004e 	bl	4007a8 <putchar@plt+0x58>
  400674:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400678:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400680 <memcpy@plt-0x20>:
  400680:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400684:	b0000090 	adrp	x16, 411000 <putchar@plt+0x108b0>
  400688:	f947fe11 	ldr	x17, [x16, #4088]
  40068c:	913fe210 	add	x16, x16, #0xff8
  400690:	d61f0220 	br	x17
  400694:	d503201f 	nop
  400698:	d503201f 	nop
  40069c:	d503201f 	nop

00000000004006a0 <memcpy@plt>:
  4006a0:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  4006a4:	f9400211 	ldr	x17, [x16]
  4006a8:	91000210 	add	x16, x16, #0x0
  4006ac:	d61f0220 	br	x17

00000000004006b0 <strtok@plt>:
  4006b0:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  4006b4:	f9400611 	ldr	x17, [x16, #8]
  4006b8:	91002210 	add	x16, x16, #0x8
  4006bc:	d61f0220 	br	x17

00000000004006c0 <strlen@plt>:
  4006c0:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  4006c4:	f9400a11 	ldr	x17, [x16, #16]
  4006c8:	91004210 	add	x16, x16, #0x10
  4006cc:	d61f0220 	br	x17

00000000004006d0 <strtok_r@plt>:
  4006d0:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  4006d4:	f9400e11 	ldr	x17, [x16, #24]
  4006d8:	91006210 	add	x16, x16, #0x18
  4006dc:	d61f0220 	br	x17

00000000004006e0 <__libc_start_main@plt>:
  4006e0:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  4006e4:	f9401211 	ldr	x17, [x16, #32]
  4006e8:	91008210 	add	x16, x16, #0x20
  4006ec:	d61f0220 	br	x17

00000000004006f0 <memset@plt>:
  4006f0:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  4006f4:	f9401611 	ldr	x17, [x16, #40]
  4006f8:	9100a210 	add	x16, x16, #0x28
  4006fc:	d61f0220 	br	x17

0000000000400700 <__gmon_start__@plt>:
  400700:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  400704:	f9401a11 	ldr	x17, [x16, #48]
  400708:	9100c210 	add	x16, x16, #0x30
  40070c:	d61f0220 	br	x17

0000000000400710 <abort@plt>:
  400710:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  400714:	f9401e11 	ldr	x17, [x16, #56]
  400718:	9100e210 	add	x16, x16, #0x38
  40071c:	d61f0220 	br	x17

0000000000400720 <puts@plt>:
  400720:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  400724:	f9402211 	ldr	x17, [x16, #64]
  400728:	91010210 	add	x16, x16, #0x40
  40072c:	d61f0220 	br	x17

0000000000400730 <strcpy@plt>:
  400730:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  400734:	f9402611 	ldr	x17, [x16, #72]
  400738:	91012210 	add	x16, x16, #0x48
  40073c:	d61f0220 	br	x17

0000000000400740 <printf@plt>:
  400740:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  400744:	f9402a11 	ldr	x17, [x16, #80]
  400748:	91014210 	add	x16, x16, #0x50
  40074c:	d61f0220 	br	x17

0000000000400750 <putchar@plt>:
  400750:	d0000090 	adrp	x16, 412000 <putchar@plt+0x118b0>
  400754:	f9402e11 	ldr	x17, [x16, #88]
  400758:	91016210 	add	x16, x16, #0x58
  40075c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400760 <.text>:
  400760:	d280001d 	mov	x29, #0x0                   	// #0
  400764:	d280001e 	mov	x30, #0x0                   	// #0
  400768:	aa0003e5 	mov	x5, x0
  40076c:	f94003e1 	ldr	x1, [sp]
  400770:	910023e2 	add	x2, sp, #0x8
  400774:	910003e6 	mov	x6, sp
  400778:	580000c0 	ldr	x0, 400790 <putchar@plt+0x40>
  40077c:	580000e3 	ldr	x3, 400798 <putchar@plt+0x48>
  400780:	58000104 	ldr	x4, 4007a0 <putchar@plt+0x50>
  400784:	97ffffd7 	bl	4006e0 <__libc_start_main@plt>
  400788:	97ffffe2 	bl	400710 <abort@plt>
  40078c:	00000000 	.inst	0x00000000 ; undefined
  400790:	00400f88 	.inst	0x00400f88 ; undefined
  400794:	00000000 	.inst	0x00000000 ; undefined
  400798:	00400fa8 	.inst	0x00400fa8 ; undefined
  40079c:	00000000 	.inst	0x00000000 ; undefined
  4007a0:	00401028 	.inst	0x00401028 ; undefined
  4007a4:	00000000 	.inst	0x00000000 ; undefined
  4007a8:	b0000080 	adrp	x0, 411000 <putchar@plt+0x108b0>
  4007ac:	f947f000 	ldr	x0, [x0, #4064]
  4007b0:	b4000040 	cbz	x0, 4007b8 <putchar@plt+0x68>
  4007b4:	17ffffd3 	b	400700 <__gmon_start__@plt>
  4007b8:	d65f03c0 	ret
  4007bc:	00000000 	.inst	0x00000000 ; undefined
  4007c0:	d0000080 	adrp	x0, 412000 <putchar@plt+0x118b0>
  4007c4:	9101c000 	add	x0, x0, #0x70
  4007c8:	d0000081 	adrp	x1, 412000 <putchar@plt+0x118b0>
  4007cc:	9101c021 	add	x1, x1, #0x70
  4007d0:	eb00003f 	cmp	x1, x0
  4007d4:	540000a0 	b.eq	4007e8 <putchar@plt+0x98>  // b.none
  4007d8:	b0000001 	adrp	x1, 401000 <putchar@plt+0x8b0>
  4007dc:	f9402421 	ldr	x1, [x1, #72]
  4007e0:	b4000041 	cbz	x1, 4007e8 <putchar@plt+0x98>
  4007e4:	d61f0020 	br	x1
  4007e8:	d65f03c0 	ret
  4007ec:	d503201f 	nop
  4007f0:	d0000080 	adrp	x0, 412000 <putchar@plt+0x118b0>
  4007f4:	9101c000 	add	x0, x0, #0x70
  4007f8:	d0000081 	adrp	x1, 412000 <putchar@plt+0x118b0>
  4007fc:	9101c021 	add	x1, x1, #0x70
  400800:	cb000021 	sub	x1, x1, x0
  400804:	9343fc21 	asr	x1, x1, #3
  400808:	8b41fc21 	add	x1, x1, x1, lsr #63
  40080c:	9341fc21 	asr	x1, x1, #1
  400810:	b40000a1 	cbz	x1, 400824 <putchar@plt+0xd4>
  400814:	b0000002 	adrp	x2, 401000 <putchar@plt+0x8b0>
  400818:	f9402842 	ldr	x2, [x2, #80]
  40081c:	b4000042 	cbz	x2, 400824 <putchar@plt+0xd4>
  400820:	d61f0040 	br	x2
  400824:	d65f03c0 	ret
  400828:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40082c:	910003fd 	mov	x29, sp
  400830:	f9000bf3 	str	x19, [sp, #16]
  400834:	d0000093 	adrp	x19, 412000 <putchar@plt+0x118b0>
  400838:	3941c260 	ldrb	w0, [x19, #112]
  40083c:	35000080 	cbnz	w0, 40084c <putchar@plt+0xfc>
  400840:	97ffffe0 	bl	4007c0 <putchar@plt+0x70>
  400844:	52800020 	mov	w0, #0x1                   	// #1
  400848:	3901c260 	strb	w0, [x19, #112]
  40084c:	f9400bf3 	ldr	x19, [sp, #16]
  400850:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400854:	d65f03c0 	ret
  400858:	17ffffe6 	b	4007f0 <putchar@plt+0xa0>
  40085c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400860:	910003fd 	mov	x29, sp
  400864:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400868:	91016000 	add	x0, x0, #0x58
  40086c:	f9001ba0 	str	x0, [x29, #48]
  400870:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400874:	91016001 	add	x1, x0, #0x58
  400878:	910043a0 	add	x0, x29, #0x10
  40087c:	a9400c22 	ldp	x2, x3, [x1]
  400880:	a9000c02 	stp	x2, x3, [x0]
  400884:	f9400822 	ldr	x2, [x1, #16]
  400888:	f9000802 	str	x2, [x0, #16]
  40088c:	b8417021 	ldur	w1, [x1, #23]
  400890:	b8017001 	stur	w1, [x0, #23]
  400894:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400898:	9101e001 	add	x1, x0, #0x78
  40089c:	910043a0 	add	x0, x29, #0x10
  4008a0:	97ffff84 	bl	4006b0 <strtok@plt>
  4008a4:	f9001fa0 	str	x0, [x29, #56]
  4008a8:	1400000b 	b	4008d4 <putchar@plt+0x184>
  4008ac:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  4008b0:	91020000 	add	x0, x0, #0x80
  4008b4:	f9401fa1 	ldr	x1, [x29, #56]
  4008b8:	97ffffa2 	bl	400740 <printf@plt>
  4008bc:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  4008c0:	9101e000 	add	x0, x0, #0x78
  4008c4:	aa0003e1 	mov	x1, x0
  4008c8:	d2800000 	mov	x0, #0x0                   	// #0
  4008cc:	97ffff79 	bl	4006b0 <strtok@plt>
  4008d0:	f9001fa0 	str	x0, [x29, #56]
  4008d4:	f9401fa0 	ldr	x0, [x29, #56]
  4008d8:	f100001f 	cmp	x0, #0x0
  4008dc:	54fffe81 	b.ne	4008ac <putchar@plt+0x15c>  // b.any
  4008e0:	52800140 	mov	w0, #0xa                   	// #10
  4008e4:	97ffff9b 	bl	400750 <putchar@plt>
  4008e8:	52800000 	mov	w0, #0x0                   	// #0
  4008ec:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4008f0:	d65f03c0 	ret
  4008f4:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4008f8:	910003fd 	mov	x29, sp
  4008fc:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400900:	91022000 	add	x0, x0, #0x88
  400904:	f9001ba0 	str	x0, [x29, #48]
  400908:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  40090c:	9102a000 	add	x0, x0, #0xa8
  400910:	910043a2 	add	x2, x29, #0x10
  400914:	aa0003e3 	mov	x3, x0
  400918:	a9400460 	ldp	x0, x1, [x3]
  40091c:	a9000440 	stp	x0, x1, [x2]
  400920:	91003c61 	add	x1, x3, #0xf
  400924:	91003c40 	add	x0, x2, #0xf
  400928:	b9400021 	ldr	w1, [x1]
  40092c:	b9000001 	str	w1, [x0]
  400930:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400934:	91028000 	add	x0, x0, #0xa0
  400938:	f90017a0 	str	x0, [x29, #40]
  40093c:	910043a0 	add	x0, x29, #0x10
  400940:	f94017a1 	ldr	x1, [x29, #40]
  400944:	97ffff5b 	bl	4006b0 <strtok@plt>
  400948:	f9001fa0 	str	x0, [x29, #56]
  40094c:	14000007 	b	400968 <putchar@plt+0x218>
  400950:	f9401fa0 	ldr	x0, [x29, #56]
  400954:	97ffff73 	bl	400720 <puts@plt>
  400958:	f94017a1 	ldr	x1, [x29, #40]
  40095c:	d2800000 	mov	x0, #0x0                   	// #0
  400960:	97ffff54 	bl	4006b0 <strtok@plt>
  400964:	f9001fa0 	str	x0, [x29, #56]
  400968:	f9401fa0 	ldr	x0, [x29, #56]
  40096c:	f100001f 	cmp	x0, #0x0
  400970:	54ffff01 	b.ne	400950 <putchar@plt+0x200>  // b.any
  400974:	d503201f 	nop
  400978:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40097c:	d65f03c0 	ret
  400980:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  400984:	910003fd 	mov	x29, sp
  400988:	b9005fbf 	str	wzr, [x29, #92]
  40098c:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400990:	91036001 	add	x1, x0, #0xd8
  400994:	910103a0 	add	x0, x29, #0x40
  400998:	f9400022 	ldr	x2, [x1]
  40099c:	f9000002 	str	x2, [x0]
  4009a0:	f8406021 	ldur	x1, [x1, #6]
  4009a4:	f8006001 	stur	x1, [x0, #6]
  4009a8:	910103a0 	add	x0, x29, #0x40
  4009ac:	f9002ba0 	str	x0, [x29, #80]
  4009b0:	1400000a 	b	4009d8 <putchar@plt+0x288>
  4009b4:	b9805fa0 	ldrsw	x0, [x29, #92]
  4009b8:	d37df000 	lsl	x0, x0, #3
  4009bc:	9100a3a1 	add	x1, x29, #0x28
  4009c0:	f8606820 	ldr	x0, [x1, x0]
  4009c4:	97ffff57 	bl	400720 <puts@plt>
  4009c8:	b9405fa0 	ldr	w0, [x29, #92]
  4009cc:	11000400 	add	w0, w0, #0x1
  4009d0:	b9005fa0 	str	w0, [x29, #92]
  4009d4:	f9002bbf 	str	xzr, [x29, #80]
  4009d8:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  4009dc:	91030000 	add	x0, x0, #0xc0
  4009e0:	aa0003e1 	mov	x1, x0
  4009e4:	f9402ba0 	ldr	x0, [x29, #80]
  4009e8:	97ffff32 	bl	4006b0 <strtok@plt>
  4009ec:	aa0003e2 	mov	x2, x0
  4009f0:	b9805fa0 	ldrsw	x0, [x29, #92]
  4009f4:	d37df000 	lsl	x0, x0, #3
  4009f8:	9100a3a1 	add	x1, x29, #0x28
  4009fc:	f8206822 	str	x2, [x1, x0]
  400a00:	b9805fa0 	ldrsw	x0, [x29, #92]
  400a04:	d37df000 	lsl	x0, x0, #3
  400a08:	9100a3a1 	add	x1, x29, #0x28
  400a0c:	f8606820 	ldr	x0, [x1, x0]
  400a10:	f100001f 	cmp	x0, #0x0
  400a14:	54fffd01 	b.ne	4009b4 <putchar@plt+0x264>  // b.any
  400a18:	f94017a1 	ldr	x1, [x29, #40]
  400a1c:	f9401ba2 	ldr	x2, [x29, #48]
  400a20:	f9401fa3 	ldr	x3, [x29, #56]
  400a24:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400a28:	91032000 	add	x0, x0, #0xc8
  400a2c:	97ffff45 	bl	400740 <printf@plt>
  400a30:	d503201f 	nop
  400a34:	a8c67bfd 	ldp	x29, x30, [sp], #96
  400a38:	d65f03c0 	ret
  400a3c:	a9a37bfd 	stp	x29, x30, [sp, #-464]!
  400a40:	910003fd 	mov	x29, sp
  400a44:	b901cfbf 	str	wzr, [x29, #460]
  400a48:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400a4c:	91048001 	add	x1, x0, #0x120
  400a50:	9102e3a0 	add	x0, x29, #0xb8
  400a54:	a9400c22 	ldp	x2, x3, [x1]
  400a58:	a9000c02 	stp	x2, x3, [x0]
  400a5c:	a9410c22 	ldp	x2, x3, [x1, #16]
  400a60:	a9010c02 	stp	x2, x3, [x0, #16]
  400a64:	f9401022 	ldr	x2, [x1, #32]
  400a68:	f9001002 	str	x2, [x0, #32]
  400a6c:	3940a021 	ldrb	w1, [x1, #40]
  400a70:	3900a001 	strb	w1, [x0, #40]
  400a74:	910387a0 	add	x0, x29, #0xe1
  400a78:	d2801ac1 	mov	x1, #0xd6                  	// #214
  400a7c:	aa0103e2 	mov	x2, x1
  400a80:	52800001 	mov	w1, #0x0                   	// #0
  400a84:	97ffff1b 	bl	4006f0 <memset@plt>
  400a88:	9102e3a0 	add	x0, x29, #0xb8
  400a8c:	f900e3a0 	str	x0, [x29, #448]
  400a90:	14000025 	b	400b24 <putchar@plt+0x3d4>
  400a94:	b981cfa0 	ldrsw	x0, [x29, #460]
  400a98:	d37df000 	lsl	x0, x0, #3
  400a9c:	910063a1 	add	x1, x29, #0x18
  400aa0:	f8606820 	ldr	x0, [x1, x0]
  400aa4:	f900e3a0 	str	x0, [x29, #448]
  400aa8:	14000005 	b	400abc <putchar@plt+0x36c>
  400aac:	b941cfa0 	ldr	w0, [x29, #460]
  400ab0:	11000400 	add	w0, w0, #0x1
  400ab4:	b901cfa0 	str	w0, [x29, #460]
  400ab8:	f900e3bf 	str	xzr, [x29, #448]
  400abc:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400ac0:	9103a000 	add	x0, x0, #0xe8
  400ac4:	aa0003e1 	mov	x1, x0
  400ac8:	f940e3a0 	ldr	x0, [x29, #448]
  400acc:	97fffef9 	bl	4006b0 <strtok@plt>
  400ad0:	aa0003e2 	mov	x2, x0
  400ad4:	b981cfa0 	ldrsw	x0, [x29, #460]
  400ad8:	d37df000 	lsl	x0, x0, #3
  400adc:	910063a1 	add	x1, x29, #0x18
  400ae0:	f8206822 	str	x2, [x1, x0]
  400ae4:	b981cfa0 	ldrsw	x0, [x29, #460]
  400ae8:	d37df000 	lsl	x0, x0, #3
  400aec:	910063a1 	add	x1, x29, #0x18
  400af0:	f8606820 	ldr	x0, [x1, x0]
  400af4:	f100001f 	cmp	x0, #0x0
  400af8:	54fffda1 	b.ne	400aac <putchar@plt+0x35c>  // b.any
  400afc:	b941cfa0 	ldr	w0, [x29, #460]
  400b00:	11000401 	add	w1, w0, #0x1
  400b04:	b901cfa1 	str	w1, [x29, #460]
  400b08:	93407c00 	sxtw	x0, w0
  400b0c:	d37df000 	lsl	x0, x0, #3
  400b10:	910063a1 	add	x1, x29, #0x18
  400b14:	b0000002 	adrp	x2, 401000 <putchar@plt+0x8b0>
  400b18:	9103c042 	add	x2, x2, #0xf0
  400b1c:	f8206822 	str	x2, [x1, x0]
  400b20:	f900e3bf 	str	xzr, [x29, #448]
  400b24:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400b28:	91030000 	add	x0, x0, #0xc0
  400b2c:	aa0003e1 	mov	x1, x0
  400b30:	f940e3a0 	ldr	x0, [x29, #448]
  400b34:	97fffedf 	bl	4006b0 <strtok@plt>
  400b38:	aa0003e2 	mov	x2, x0
  400b3c:	b981cfa0 	ldrsw	x0, [x29, #460]
  400b40:	d37df000 	lsl	x0, x0, #3
  400b44:	910063a1 	add	x1, x29, #0x18
  400b48:	f8206822 	str	x2, [x1, x0]
  400b4c:	b981cfa0 	ldrsw	x0, [x29, #460]
  400b50:	d37df000 	lsl	x0, x0, #3
  400b54:	910063a1 	add	x1, x29, #0x18
  400b58:	f8606820 	ldr	x0, [x1, x0]
  400b5c:	f100001f 	cmp	x0, #0x0
  400b60:	54fff9a1 	b.ne	400a94 <putchar@plt+0x344>  // b.any
  400b64:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400b68:	9103e000 	add	x0, x0, #0xf8
  400b6c:	b941cfa1 	ldr	w1, [x29, #460]
  400b70:	97fffef4 	bl	400740 <printf@plt>
  400b74:	b901bfbf 	str	wzr, [x29, #444]
  400b78:	1400000b 	b	400ba4 <putchar@plt+0x454>
  400b7c:	b981bfa0 	ldrsw	x0, [x29, #444]
  400b80:	d37df000 	lsl	x0, x0, #3
  400b84:	910063a1 	add	x1, x29, #0x18
  400b88:	f8606821 	ldr	x1, [x1, x0]
  400b8c:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400b90:	91046000 	add	x0, x0, #0x118
  400b94:	97fffeeb 	bl	400740 <printf@plt>
  400b98:	b941bfa0 	ldr	w0, [x29, #444]
  400b9c:	11000400 	add	w0, w0, #0x1
  400ba0:	b901bfa0 	str	w0, [x29, #444]
  400ba4:	b941bfa1 	ldr	w1, [x29, #444]
  400ba8:	b941cfa0 	ldr	w0, [x29, #460]
  400bac:	6b00003f 	cmp	w1, w0
  400bb0:	54fffe6b 	b.lt	400b7c <putchar@plt+0x42c>  // b.tstop
  400bb4:	52800000 	mov	w0, #0x0                   	// #0
  400bb8:	a8dd7bfd 	ldp	x29, x30, [sp], #464
  400bbc:	d65f03c0 	ret
  400bc0:	a9a37bfd 	stp	x29, x30, [sp, #-464]!
  400bc4:	910003fd 	mov	x29, sp
  400bc8:	b901cfbf 	str	wzr, [x29, #460]
  400bcc:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400bd0:	91048001 	add	x1, x0, #0x120
  400bd4:	910303a0 	add	x0, x29, #0xc0
  400bd8:	a9400c22 	ldp	x2, x3, [x1]
  400bdc:	a9000c02 	stp	x2, x3, [x0]
  400be0:	a9410c22 	ldp	x2, x3, [x1, #16]
  400be4:	a9010c02 	stp	x2, x3, [x0, #16]
  400be8:	f9401022 	ldr	x2, [x1, #32]
  400bec:	f9001002 	str	x2, [x0, #32]
  400bf0:	3940a021 	ldrb	w1, [x1, #40]
  400bf4:	3900a001 	strb	w1, [x0, #40]
  400bf8:	9103a7a0 	add	x0, x29, #0xe9
  400bfc:	d2801ac1 	mov	x1, #0xd6                  	// #214
  400c00:	aa0103e2 	mov	x2, x1
  400c04:	52800001 	mov	w1, #0x0                   	// #0
  400c08:	97fffeba 	bl	4006f0 <memset@plt>
  400c0c:	910303a0 	add	x0, x29, #0xc0
  400c10:	f900e3a0 	str	x0, [x29, #448]
  400c14:	f9000fbf 	str	xzr, [x29, #24]
  400c18:	f9000bbf 	str	xzr, [x29, #16]
  400c1c:	14000027 	b	400cb8 <putchar@plt+0x568>
  400c20:	b981cfa0 	ldrsw	x0, [x29, #460]
  400c24:	d37df000 	lsl	x0, x0, #3
  400c28:	910083a1 	add	x1, x29, #0x20
  400c2c:	f8606820 	ldr	x0, [x1, x0]
  400c30:	f900e3a0 	str	x0, [x29, #448]
  400c34:	14000005 	b	400c48 <putchar@plt+0x4f8>
  400c38:	b941cfa0 	ldr	w0, [x29, #460]
  400c3c:	11000400 	add	w0, w0, #0x1
  400c40:	b901cfa0 	str	w0, [x29, #460]
  400c44:	f900e3bf 	str	xzr, [x29, #448]
  400c48:	910043a1 	add	x1, x29, #0x10
  400c4c:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400c50:	9103a000 	add	x0, x0, #0xe8
  400c54:	aa0103e2 	mov	x2, x1
  400c58:	aa0003e1 	mov	x1, x0
  400c5c:	f940e3a0 	ldr	x0, [x29, #448]
  400c60:	97fffe9c 	bl	4006d0 <strtok_r@plt>
  400c64:	aa0003e2 	mov	x2, x0
  400c68:	b981cfa0 	ldrsw	x0, [x29, #460]
  400c6c:	d37df000 	lsl	x0, x0, #3
  400c70:	910083a1 	add	x1, x29, #0x20
  400c74:	f8206822 	str	x2, [x1, x0]
  400c78:	b981cfa0 	ldrsw	x0, [x29, #460]
  400c7c:	d37df000 	lsl	x0, x0, #3
  400c80:	910083a1 	add	x1, x29, #0x20
  400c84:	f8606820 	ldr	x0, [x1, x0]
  400c88:	f100001f 	cmp	x0, #0x0
  400c8c:	54fffd61 	b.ne	400c38 <putchar@plt+0x4e8>  // b.any
  400c90:	b941cfa0 	ldr	w0, [x29, #460]
  400c94:	11000401 	add	w1, w0, #0x1
  400c98:	b901cfa1 	str	w1, [x29, #460]
  400c9c:	93407c00 	sxtw	x0, w0
  400ca0:	d37df000 	lsl	x0, x0, #3
  400ca4:	910083a1 	add	x1, x29, #0x20
  400ca8:	b0000002 	adrp	x2, 401000 <putchar@plt+0x8b0>
  400cac:	9103c042 	add	x2, x2, #0xf0
  400cb0:	f8206822 	str	x2, [x1, x0]
  400cb4:	f900e3bf 	str	xzr, [x29, #448]
  400cb8:	910063a1 	add	x1, x29, #0x18
  400cbc:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400cc0:	91030000 	add	x0, x0, #0xc0
  400cc4:	aa0103e2 	mov	x2, x1
  400cc8:	aa0003e1 	mov	x1, x0
  400ccc:	f940e3a0 	ldr	x0, [x29, #448]
  400cd0:	97fffe80 	bl	4006d0 <strtok_r@plt>
  400cd4:	aa0003e2 	mov	x2, x0
  400cd8:	b981cfa0 	ldrsw	x0, [x29, #460]
  400cdc:	d37df000 	lsl	x0, x0, #3
  400ce0:	910083a1 	add	x1, x29, #0x20
  400ce4:	f8206822 	str	x2, [x1, x0]
  400ce8:	b981cfa0 	ldrsw	x0, [x29, #460]
  400cec:	d37df000 	lsl	x0, x0, #3
  400cf0:	910083a1 	add	x1, x29, #0x20
  400cf4:	f8606820 	ldr	x0, [x1, x0]
  400cf8:	f100001f 	cmp	x0, #0x0
  400cfc:	54fff921 	b.ne	400c20 <putchar@plt+0x4d0>  // b.any
  400d00:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400d04:	9103e000 	add	x0, x0, #0xf8
  400d08:	b941cfa1 	ldr	w1, [x29, #460]
  400d0c:	97fffe8d 	bl	400740 <printf@plt>
  400d10:	b901cbbf 	str	wzr, [x29, #456]
  400d14:	1400000b 	b	400d40 <putchar@plt+0x5f0>
  400d18:	b981cba0 	ldrsw	x0, [x29, #456]
  400d1c:	d37df000 	lsl	x0, x0, #3
  400d20:	910083a1 	add	x1, x29, #0x20
  400d24:	f8606821 	ldr	x1, [x1, x0]
  400d28:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400d2c:	91046000 	add	x0, x0, #0x118
  400d30:	97fffe84 	bl	400740 <printf@plt>
  400d34:	b941cba0 	ldr	w0, [x29, #456]
  400d38:	11000400 	add	w0, w0, #0x1
  400d3c:	b901cba0 	str	w0, [x29, #456]
  400d40:	b941cba1 	ldr	w1, [x29, #456]
  400d44:	b941cfa0 	ldr	w0, [x29, #460]
  400d48:	6b00003f 	cmp	w1, w0
  400d4c:	54fffe6b 	b.lt	400d18 <putchar@plt+0x5c8>  // b.tstop
  400d50:	52800000 	mov	w0, #0x0                   	// #0
  400d54:	a8dd7bfd 	ldp	x29, x30, [sp], #464
  400d58:	d65f03c0 	ret
  400d5c:	a9a47bfd 	stp	x29, x30, [sp, #-448]!
  400d60:	910003fd 	mov	x29, sp
  400d64:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400d68:	91088000 	add	x0, x0, #0x220
  400d6c:	f900dfa0 	str	x0, [x29, #440]
  400d70:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400d74:	9108c001 	add	x1, x0, #0x230
  400d78:	910043a0 	add	x0, x29, #0x10
  400d7c:	aa0103e3 	mov	x3, x1
  400d80:	d2801361 	mov	x1, #0x9b                  	// #155
  400d84:	aa0103e2 	mov	x2, x1
  400d88:	aa0303e1 	mov	x1, x3
  400d8c:	97fffe45 	bl	4006a0 <memcpy@plt>
  400d90:	9102c3a0 	add	x0, x29, #0xb0
  400d94:	d2802002 	mov	x2, #0x100                 	// #256
  400d98:	52800001 	mov	w1, #0x0                   	// #0
  400d9c:	97fffe55 	bl	4006f0 <memset@plt>
  400da0:	910043a0 	add	x0, x29, #0x10
  400da4:	f940dfa1 	ldr	x1, [x29, #440]
  400da8:	97fffe42 	bl	4006b0 <strtok@plt>
  400dac:	f900dba0 	str	x0, [x29, #432]
  400db0:	f940dba0 	ldr	x0, [x29, #432]
  400db4:	f100001f 	cmp	x0, #0x0
  400db8:	54000060 	b.eq	400dc4 <putchar@plt+0x674>  // b.none
  400dbc:	f940dba0 	ldr	x0, [x29, #432]
  400dc0:	97fffe58 	bl	400720 <puts@plt>
  400dc4:	f940dfa1 	ldr	x1, [x29, #440]
  400dc8:	d2800000 	mov	x0, #0x0                   	// #0
  400dcc:	97fffe39 	bl	4006b0 <strtok@plt>
  400dd0:	f900dba0 	str	x0, [x29, #432]
  400dd4:	f940dba0 	ldr	x0, [x29, #432]
  400dd8:	f100001f 	cmp	x0, #0x0
  400ddc:	54000060 	b.eq	400de8 <putchar@plt+0x698>  // b.none
  400de0:	f940dba0 	ldr	x0, [x29, #432]
  400de4:	97fffe4f 	bl	400720 <puts@plt>
  400de8:	9102c3a0 	add	x0, x29, #0xb0
  400dec:	f940dba1 	ldr	x1, [x29, #432]
  400df0:	97fffe50 	bl	400730 <strcpy@plt>
  400df4:	9102c3a1 	add	x1, x29, #0xb0
  400df8:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400dfc:	9108a000 	add	x0, x0, #0x228
  400e00:	97fffe50 	bl	400740 <printf@plt>
  400e04:	52800000 	mov	w0, #0x0                   	// #0
  400e08:	a8dc7bfd 	ldp	x29, x30, [sp], #448
  400e0c:	d65f03c0 	ret
  400e10:	a9a47bfd 	stp	x29, x30, [sp, #-448]!
  400e14:	910003fd 	mov	x29, sp
  400e18:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400e1c:	910b4000 	add	x0, x0, #0x2d0
  400e20:	f900dba0 	str	x0, [x29, #432]
  400e24:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400e28:	910b6001 	add	x1, x0, #0x2d8
  400e2c:	910043a0 	add	x0, x29, #0x10
  400e30:	aa0103e3 	mov	x3, x1
  400e34:	d28013e1 	mov	x1, #0x9f                  	// #159
  400e38:	aa0103e2 	mov	x2, x1
  400e3c:	aa0303e1 	mov	x1, x3
  400e40:	97fffe18 	bl	4006a0 <memcpy@plt>
  400e44:	910043a0 	add	x0, x29, #0x10
  400e48:	f940dba1 	ldr	x1, [x29, #432]
  400e4c:	97fffe19 	bl	4006b0 <strtok@plt>
  400e50:	f900dfa0 	str	x0, [x29, #440]
  400e54:	1400000e 	b	400e8c <putchar@plt+0x73c>
  400e58:	f940dfa0 	ldr	x0, [x29, #440]
  400e5c:	97fffe31 	bl	400720 <puts@plt>
  400e60:	9102c3a0 	add	x0, x29, #0xb0
  400e64:	d2802002 	mov	x2, #0x100                 	// #256
  400e68:	52800001 	mov	w1, #0x0                   	// #0
  400e6c:	97fffe21 	bl	4006f0 <memset@plt>
  400e70:	9102c3a0 	add	x0, x29, #0xb0
  400e74:	f940dfa1 	ldr	x1, [x29, #440]
  400e78:	97fffe2e 	bl	400730 <strcpy@plt>
  400e7c:	f940dba1 	ldr	x1, [x29, #432]
  400e80:	d2800000 	mov	x0, #0x0                   	// #0
  400e84:	97fffe0b 	bl	4006b0 <strtok@plt>
  400e88:	f900dfa0 	str	x0, [x29, #440]
  400e8c:	f940dfa0 	ldr	x0, [x29, #440]
  400e90:	f100001f 	cmp	x0, #0x0
  400e94:	54fffe21 	b.ne	400e58 <putchar@plt+0x708>  // b.any
  400e98:	52800000 	mov	w0, #0x0                   	// #0
  400e9c:	a8dc7bfd 	ldp	x29, x30, [sp], #448
  400ea0:	d65f03c0 	ret
  400ea4:	a9ae7bfd 	stp	x29, x30, [sp, #-288]!
  400ea8:	910003fd 	mov	x29, sp
  400eac:	f9000bf3 	str	x19, [sp, #16]
  400eb0:	f9008fbf 	str	xzr, [x29, #280]
  400eb4:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400eb8:	910e8001 	add	x1, x0, #0x3a0
  400ebc:	9101a3a0 	add	x0, x29, #0x68
  400ec0:	aa0103e3 	mov	x3, x1
  400ec4:	d2801361 	mov	x1, #0x9b                  	// #155
  400ec8:	aa0103e2 	mov	x2, x1
  400ecc:	aa0303e1 	mov	x1, x3
  400ed0:	97fffdf4 	bl	4006a0 <memcpy@plt>
  400ed4:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400ed8:	910de000 	add	x0, x0, #0x378
  400edc:	f90087a0 	str	x0, [x29, #264]
  400ee0:	b90117bf 	str	wzr, [x29, #276]
  400ee4:	9101a3a0 	add	x0, x29, #0x68
  400ee8:	f9008fa0 	str	x0, [x29, #280]
  400eec:	14000015 	b	400f40 <putchar@plt+0x7f0>
  400ef0:	b98117a0 	ldrsw	x0, [x29, #276]
  400ef4:	d37df000 	lsl	x0, x0, #3
  400ef8:	9100a3a1 	add	x1, x29, #0x28
  400efc:	f8606833 	ldr	x19, [x1, x0]
  400f00:	b98117a0 	ldrsw	x0, [x29, #276]
  400f04:	d37df000 	lsl	x0, x0, #3
  400f08:	9100a3a1 	add	x1, x29, #0x28
  400f0c:	f8606820 	ldr	x0, [x1, x0]
  400f10:	97fffdec 	bl	4006c0 <strlen@plt>
  400f14:	aa0003e1 	mov	x1, x0
  400f18:	b0000000 	adrp	x0, 401000 <putchar@plt+0x8b0>
  400f1c:	910e0000 	add	x0, x0, #0x380
  400f20:	aa0103e3 	mov	x3, x1
  400f24:	aa1303e2 	mov	x2, x19
  400f28:	b94117a1 	ldr	w1, [x29, #276]
  400f2c:	97fffe05 	bl	400740 <printf@plt>
  400f30:	b94117a0 	ldr	w0, [x29, #276]
  400f34:	11000400 	add	w0, w0, #0x1
  400f38:	b90117a0 	str	w0, [x29, #276]
  400f3c:	f9008fbf 	str	xzr, [x29, #280]
  400f40:	f94087a1 	ldr	x1, [x29, #264]
  400f44:	f9408fa0 	ldr	x0, [x29, #280]
  400f48:	97fffdda 	bl	4006b0 <strtok@plt>
  400f4c:	aa0003e2 	mov	x2, x0
  400f50:	b98117a0 	ldrsw	x0, [x29, #276]
  400f54:	d37df000 	lsl	x0, x0, #3
  400f58:	9100a3a1 	add	x1, x29, #0x28
  400f5c:	f8206822 	str	x2, [x1, x0]
  400f60:	b98117a0 	ldrsw	x0, [x29, #276]
  400f64:	d37df000 	lsl	x0, x0, #3
  400f68:	9100a3a1 	add	x1, x29, #0x28
  400f6c:	f8606820 	ldr	x0, [x1, x0]
  400f70:	f100001f 	cmp	x0, #0x0
  400f74:	54fffbe1 	b.ne	400ef0 <putchar@plt+0x7a0>  // b.any
  400f78:	d503201f 	nop
  400f7c:	f9400bf3 	ldr	x19, [sp, #16]
  400f80:	a8d27bfd 	ldp	x29, x30, [sp], #288
  400f84:	d65f03c0 	ret
  400f88:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400f8c:	910003fd 	mov	x29, sp
  400f90:	97ffff0c 	bl	400bc0 <putchar@plt+0x470>
  400f94:	97ffff9f 	bl	400e10 <putchar@plt+0x6c0>
  400f98:	97ffffc3 	bl	400ea4 <putchar@plt+0x754>
  400f9c:	52800000 	mov	w0, #0x0                   	// #0
  400fa0:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400fa4:	d65f03c0 	ret
  400fa8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400fac:	910003fd 	mov	x29, sp
  400fb0:	a901d7f4 	stp	x20, x21, [sp, #24]
  400fb4:	b0000094 	adrp	x20, 411000 <putchar@plt+0x108b0>
  400fb8:	b0000095 	adrp	x21, 411000 <putchar@plt+0x108b0>
  400fbc:	91374294 	add	x20, x20, #0xdd0
  400fc0:	913722b5 	add	x21, x21, #0xdc8
  400fc4:	a902dff6 	stp	x22, x23, [sp, #40]
  400fc8:	cb150294 	sub	x20, x20, x21
  400fcc:	f9001ff8 	str	x24, [sp, #56]
  400fd0:	2a0003f6 	mov	w22, w0
  400fd4:	aa0103f7 	mov	x23, x1
  400fd8:	9343fe94 	asr	x20, x20, #3
  400fdc:	aa0203f8 	mov	x24, x2
  400fe0:	97fffda2 	bl	400668 <memcpy@plt-0x38>
  400fe4:	b4000194 	cbz	x20, 401014 <putchar@plt+0x8c4>
  400fe8:	f9000bb3 	str	x19, [x29, #16]
  400fec:	d2800013 	mov	x19, #0x0                   	// #0
  400ff0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400ff4:	aa1803e2 	mov	x2, x24
  400ff8:	aa1703e1 	mov	x1, x23
  400ffc:	2a1603e0 	mov	w0, w22
  401000:	91000673 	add	x19, x19, #0x1
  401004:	d63f0060 	blr	x3
  401008:	eb13029f 	cmp	x20, x19
  40100c:	54ffff21 	b.ne	400ff0 <putchar@plt+0x8a0>  // b.any
  401010:	f9400bb3 	ldr	x19, [x29, #16]
  401014:	a941d7f4 	ldp	x20, x21, [sp, #24]
  401018:	a942dff6 	ldp	x22, x23, [sp, #40]
  40101c:	f9401ff8 	ldr	x24, [sp, #56]
  401020:	a8c47bfd 	ldp	x29, x30, [sp], #64
  401024:	d65f03c0 	ret
  401028:	d65f03c0 	ret

Disassembly of section .fini:

000000000040102c <.fini>:
  40102c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  401030:	910003fd 	mov	x29, sp
  401034:	a8c17bfd 	ldp	x29, x30, [sp], #16
  401038:	d65f03c0 	ret
